The evolution of computing has resulted in an ever-increasing demand for improved memory technologies. Currently, one of the most promising memory technologies is resistive random access memory (RRAM), which combines the speed of static random access memory (SRAM), the non-volatility of flash memory, and the density of dynamic random access memory (DRAM) in a power efficient package. As shown in FIG. 1, an RRAM cell 10 typically includes a first metal electrode 12, a functional layer 14 over the first metal electrode 12, and a second metal electrode 16 over the functional layer 14. Since the functional layer 14 is often highly resistive layer, the structure of the RRAM cell 10 is often referred to as a metal-insulator-metal (MIM) stack. To set the state of the RRAM cell 10, a set voltage or a reset voltage is applied across the RRAM cell 10, which connects or disconnects the first metal electrode 12 and the second metal electrode 16 via a conductive filament in the functional layer 14. To read the contents of the RRAM cell 10, a small read voltage is used to measure the resistance, and thus the state, of the device. When the conductive filament between the first metal electrode 12 and the second metal electrode 16 is connected, the resistance of the RRAM cell 10 is low, indicating a first state of the RRAM cell 10. Conversely, when the conductive filament between the first metal electrode 12 and the second metal electrode 16 is disconnected, the resistance of the RRAM cell is high, indicating a second state of the RRAM cell 10. Because the conductive filament is thought to be very spatially localized (e.g., ˜100 nm2), and because the conductive filament is the only element necessary to accomplish the set and reset processes of the RRAM cell 10, RRAM cells are highly scalable, and may become as small as 5 nm.
As will be appreciated by those of ordinary skill in the art, a MIM stack is a highly resistive device that is incapable of storing data absent additional processing. In order to generate the RRAM cell 10, a one-time initialization step known as electro-forming (or simply forming) must be performed on the MIM stack, which permanently lowers the resistance of the device and forms the conductive filament in the functional layer 14. FIG. 2 illustrates a conventional process for initialization of the RRAM cell 10. First, a MIM stack is provided (step 100). A forming voltage significantly larger than the set voltage or the reset voltage of the RRAM cell 10 is then placed across the MIM stack for a predetermined period of time (step 102). Placing the forming voltage across the MIM stack is believed to generate one or more defects, generally in the form of oxygen vacancies, in the functional layer 14 of the RRAM cell 10. Specifically, placing the forming voltage across the MIM stack is believed to cause oxygen ions to migrate from the functional layer 14 into either the first metal electrode 12 and/or the second metal electrode 16, leaving behind a stack of oxygen vacancies which result in a low-resistance path (i.e., the conductive filament) between the first metal electrode 12 and the second metal electrode 16. The surplus of oxygen ions in the first metal electrode 12 and/or the second metal electrode 16 may migrate into functional layer and annihilate one or more of the oxygen vacancies when a reset voltage is applied across the RRAM cell 10, and may migrate out of the functional layer, leaving oxygen vacancies, when a set voltage is applied across the RRAM cell 10. As will be appreciated by those of ordinary skill in the art, the number of oxygen vacancies and/or their distribution in the functional layer may determine the resistance of the RRAM cell 10. Accordingly, the RRAM cell 10 may store data by changing between a high-resistance state and a low-resistance state. Once forming is complete, the RRAM cell 10 may then be integrated into a larger circuit or device (step 104).
Although effective at forming an RRAM cell 10 from a MIM stack, the conventional forming process discussed above suffers from many drawbacks. First, the conventional forming process requires a forming voltage significantly above the set voltage or the reset voltage of the RRAM cell 10. Accordingly, forming the RRAM cell 10 requires additional high-voltage circuitry integrated with the RRAM cell, and/or must be accomplished by an additional manufacturing step. Further, the conventional forming process results in the formation of the conductive filament at a random location within the functional layer 14. In other words, there is no way to control where the conductive filament will occur in the functional layer 14 when using the conventional forming process. In some cases where the conductive filament forms near an edge of the RRAM cell 10, the device may fail altogether, as the conductive filament may fail to change the resistance of the RRAM cell 10 in response to the set voltage or the reset voltage.
Accordingly, there is a need for an improved process for initialization of an RRAM cell that reduces and/or eliminates the requirement for a forming voltage, and further allows for precise control over the location of the conductive filament.